The new chip is around the size of a fingernail, but is able to house up to 30 billion switches. It’s hoped that the performance boost offered by the new design will be put to good use in data-intensive applications related to the Internet of Things and cognitive computing, among others.
IBM also claims that its capacity for reduced power consumption could mean that batteries in smartphones and other devices could last two to three times as long on a single charge.
The innovation at the core of the new chip is a brand-new architecture, eschewing the current FinFET design. Instead, stacks of silicon nanosheets are used to create the basic transistor structure.
IBM Research has apparently been looking into nanosheet semiconductor technology for over a decade. However, this project marks the first time that it’s been proven that the technology can offer practical benefits over FinFET architecture.
FinFET is limited by the height of its fins, which are used to carry an electrical current. However, nanosheet transistors can use extreme ultraviolet lithography for precise size adjustments, which allows their performance and power to be tailored for individual circuits. It’s already been demonstrated that FinFET chips can be scaled to 5nm, but reducing the space between fins doesn’t provide the same performance benefits that IBM is claiming with its nanosheet design.
IBM will share more details on this breakthrough at the 2017 Symposia on VLSI Technology and Circuits, which is scheduled to take place in Kyoto, Japan this week. It may take years before this research is implemented in consumer products — but in order to push computers forward, it’s crucial that companies like IBM keep one eye on what’s coming next.
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