Intel Details Next-Gen Core 2 Processor

Chipmaker Intel has unveiled details of its forthcoming 45-nanometer family of processors, previously known under the codename “Penryn.” The processor is an enhancement of the company’s existing Core 2 Duo architecture, with improvements aimed at enhancing performance, reducing power consumption, and improving virtualization.

First, Penryn will be the first of some fifteen planned processors which will use Intel’s new high-k dielectric 45 nm process, which enables Intel to increase the amount of cache memory on the processor (6 MB of Level 2 cache on dual-core chips; 12 MB on quad-core offerings) and incorporate faster front-side buses (up to 1,600 MHz. The 45 nm process also creates an opportunity to raise clock speeds on the chips without producing additional heat: Intel estimates that Penryn processors will reach or exceed 3 GHz speeds in everyday computing products.

The new chips will also feature an ultra lower-power mode Intel calls Deep Power Down; this mode complete turns off the core clock and caches, stashing the processor state in a special reserve cache so the chip can be restored quickly. The chips will also incorporate INtel’s Dynamic Acceleration Technology, which can automatically detect when one processor core is largely sitting around twiddling its thumbs; the chip can direct power from idle core(s) to the active core, enabling the chip to speed up single-threaded operations without expending any additional power. The chip also speeds up transitions in and out of virtual machines, which will help virtualization products like Xen which rely on chip-based virtualization systems.

At a low level, the Penryn processors will also offer improved performance on the SSE4 instruction set extensions, which are vector operations typically used in media and data-streaming applications. Penryn incorporates a new “Super Shuffle Engine” which will enable the chip to perform 128-bit shuffle operations (packing, unpacking, and shifts) in a single clock cycle; this, in turn, helps the chip quickly prepare data for insertion into the SSE4 instructions, Combined with the cache increases and bus-speed improvements, Intel estimates Penryns will outperform existing Core 2 Duo offerings by as much as 40 percent on some operations (like applying video codecs) and perhaps increase performance on vector-intensive applications like games by as much as 20 percent.

Intel plans to begin rolling out Penryn-based products in the second half of 2007; chips will range from CPUs intended for ultra-mobile systems to server systems. Pricing details haven’t been announced.

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