Intel’s 10-nanometer Cannon Lake chips have been a long time coming, but the company still seems to be confident in its work, recently showing a 2-in-1 PC that utilizes the technology at CES 2017. Now, Intel has stated that when Cannon Lake is finally ready for prime time, it’ll still be a “full generation ahead” of competing components from the likes of Samsung and TSMC.
Cannon Lake will use hyper scaling that allows for twice as many transistors as traditional methodology, according to a report from Engadget. This advantage will apparently produce CPUs that are capable of 25 percent better performance, while using 45 percent less power.
Intel has high hopes that Cannon Lake will extend the lifespan of Moore’s Law, the well-known observation that the number of transistors in an integrated circuit doubles roughly every two years. Moore’s Law looked to be in peril not so long ago, but now the company is bullish about its prospects for the future.
“Hyper scaling allows Intel to continue the economics of Moore’s Law,” read one slide from a presentation delivered yesterday at Intel’s Technology and Manufacturing Day event. This seems to suggest that even if the timescale of Moore’s Law slips, the company should be able to offer increasingly capable chips while continuing to keep their prices within reason.
Looking further into the future, the company plans to release enhanced iterations of its 10-nanometer chips, branded as 10+ and 10++. These components are intended to bridge the gap between the first wave of 10-nanometer processors and the 7-nanometer processors that will succeed its current technology.
Intel expects to build 10-nanometer chips for around three years before moving on to 7-nanometer chips in earnest, maintaining a similar cycle length to that of its current 14-nanometer chips.
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