Intel sticks to Moore’s Law with 3D transistors

Chipmaking giant Intel has announced that it has developed a viable method for manufacturing “3D” tri-gate transistors, a development which promised to enable the company to manufacturer future processors that pack even more computing performance into smaller sizes—all while using less power. Intel is touting the development as enabling it to keep up with Moore’s Law, which states that the number of transistors in a silicon device will double every two years. Lately, some have speculated the day of Moore’s Law might be coming to an end as chip manufacturers bump up against the constants of physical laws in their processes. Intel says its new Tri-Gate transistor process will enable the company to continue keeping up with Moore’s Law—and, not coincidentally, give it a significant advantage over its competition.

“For years we have seen limits to how small transistors can get,” said Gordon E. Moore, in a statement. “This change in the basic structure is a truly revolutionary approach, and one that should allow Moore’s Law, and the historic pace of innovation, to continue.”

Intel Planar vs Tri-Gate transistor

Traditional planar transistor (left) compared to a 3D Tri-Gate transistor (right). Notice there is a “fin” of material emerging from the silicon substrate, surrounded on three sides by the transistor gate material. (Illustration: Intel)

The term “3D transistor” summons up Tron-like visions of glowing structures rising up from the hearts of computer chips, but the reality of the Tri-Gate transistors is a little more mundane—and considerably more microscopic. Traditional chipmaking is very planar, and relies on applying materials to a silicon substrate, then etching off the parts you don’t want in order to form signal paths and transistors. The problem chipmakers face is that they’re pushing the limit on how small they can make those etchings and still have them function as effective signal gates—and that’s after shifting to ever-more exotic materials to create the gates in order to achieve reliable performance.

The Tri-Gate technology uses the same idea, but instead of etching an essentially two-dimensional layer of material on a substrate, Intel has found a cost-effective way to produce microscopic “fins” on the silicon substrate and apply gate material over those fins. The result is that three sides of the fins are in contact with the gate material, providing much more control over current flow. Intel says: “The additional control enables as much transistor current flowing as possible when the transistor is in the ‘on’ state (for performance), and as close to zero as possible when it is in the ‘off’ state (to minimize power), and enables the transistor to switch very quickly between the two states.”

Intel says the 22nm Tri-Gate transistors offer up to a 37 percent performance increase at low voltage compared to Intel’s 32nm planar transistors. At 32nm, the 3D transistors consume half the power of planar 32nm transistors.

Intel first came up with the idea for Tri-Gate transistors back in 2002, but only now has developed technology that enables cost-effective chip manufacturing with the technology. And Intel is getting ready to roll with manufacturing: the company says the first chips to feature the 3D manufacturing process will be the 22nm “Ivy Bridge” processors, the successor to the “Sandy Bridge” processors that make up the second-generation Intel Core processor line. Intel says high-volume production of Ivy Bridge should be happening by the end of 2011.

Industry watchers speculate that the Tri-Gate manufacturing process may put Intel as much as two years ahead of its competitors, at least at a technical level. However, more important for Intel in the near term might be that the Tri-Gate technology—with its lower power consumption—may make Intel processors more viable for portable electronic devices like tablets and smartphones—and give ARM-based processors designs some serious competition in the mobile device market.

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