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Intel and AMD are in an all-out, core-count war

Intel is set to commence the next salvo in the server CPU core wars, with plans to launch two new generations of Xeon processors in 2020. Much like its mainstream mobile plans, Intel will have a 10nm and 14nm solution. But where those chips stick to four cores at most, Intel’s new server CPUs are looking to chase down AMD’s Epyc 64-core chips, with 38 and 48-core options of its own.

When AMD introduced its first-generation Epyc server CPUs with up to 32 cores and 64 threads in 2017, it pushed the boundary of what was possible for a single socket chip. It did so again in 2019 with the launch of Epyc Rome chips based on the new Zen 2 architecture with up to 64 cores and 128 threads. It also broke new ground on PCIe lanes, offering up to 128 per chip with each generation. Although Intel’s server performance was roughly comparable in a number of ways, by the numbers at least, it’s been playing catchup.

Intel roadmap slide
Intel/Asus/Wccftech

Until early 2019, all Intel could offer was 28 cores and 56 threads. Some special, soldered versions of Cascade Lake-AP offered up to 56, but they weren’t scalable outside of a single socket and second-generation Epyc was just months away from edging ahead again with 64.

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The next-generation(s) of Intel’s server chips aren’t set to break that record, with maximums of 38 cores for the Ice Lake chips, and 48 on the Cooper Lake option (as per WCCFTech), but they do increase the PCIe lanes to 64. Still half that of Epyc, but it’s a step in the right direction.

Elsewhere, Intel appears to be aping features from AMD’s server chips more and more, too. Both new CPU generations are only scalable to two sockets, like Epyc. They also support eight-channel memory, just like Epyc does, as per HotHardware. They’re more power-hungry than their predecessors too, just like Epyc. But where the AMD CPUs max out at 225 watts, the new Intel Cooper Lake chips can draw as much as 300 watts from a single chip.

These new releases will be good news for companies that have had Intel server chips for years and want to maintain that in the years to come. More cores, improved memory speed support, and a greater number of PCIe lanes are all welcome (Ice Lake-SP will even support PCIE 4.0), but it still feels like Intel is chasing AMD’s tail. Many of the features introduced with these new chips are less impressive than the recent AMD announcements, and they’re still not slated to debut until Q2 and Q3 in 2020. That’s when we’d expect to see a third-generation Epyc, codenamed Milan, to be making its debut.

Scalability is one thing that Intel’s server line has had going for it in the face of Epyc’s rapid development and improvement, with Sky Lake and Cascade Lake systems offered in up to eight-socket variants. But the new Cooper Lake and Ice Lake chips are limited to just two sockets per system. That could alienate some unique use cases where Intel may have otherwise held an advantage.

It’s also telling and frustrating that Intel is once again splitting its product lineup with two offerings in 14nm and 10nm. This is the same as we’ve seen with Comet Lake and Ice Lake on mobile. Both are releasing within months of each other, and both are labeled “10th-generation.” In that case and this one, Intel looks set to introduce an expansive, but confusing lineup of hardware, which we can’t help but question. This may be yet another example of Intel being unable to meet demand for Ice Lake, so it’s looking to spread it across an alternative new-generation of hardware.

Whether that’s true or Intel just really wants to launch yet another 14nm CPU line, it could be too little too late. 64-core Epyc Milan server chips in 2020 won’t be far behind these, if not launch alongside the Ice Lake-SP option. If that happens, these chips will already look antiquated, as AMD moves to 7nm+ with TSMC’s EUV technology. Who wins in the end is up in the air, but the ramp up to higher and higher core counts sure is fun to keep up with.

Jon Martindale
Jon Martindale is a freelance evergreen writer and occasional section coordinator, covering how to guides, best-of lists, and…
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