Watch out Intel and Samsung: TSMC is gearing up for 7nm processing with trial production

Taiwan Semiconductor
Peellden/Wikimedia
The race to shrink technology and build faster, more energy-efficient components is heating up, as Taiwan Semiconductor Manufacturing Company Limited (TSMC) is pushing to beat Samsung and Intel in the 7-nanometer (nm) process technology race by launching trial production during the first half of 2017. The company originally revealed its plans in chairman Morris Chang’s report provided to shareholders on April 14.

In last week’s investors meeting, TSMC Co-CEO Mark Liu added to Chang’s report, stating that the company will likely move its 7nm process technology to volume production during the first half of 2018. He said that over twenty customers are currently “engaged” with the company regarding the new process technology, and that fifteen customer tape-outs are scheduled to take place in 2017.

“N7 is a further extension of N10 technology, with more than 60 percent in logic density gain and 30-percent to 40-percent reduction in power consumption,” Liu told investors. That is, compared to 10nm process technology, 7nm will produce chips with less power consumption and more processing capability on the same sized chip. According to Liu, TSMC’s new 7nm processing will be dedicated to mobile and “high-performance computing” applications.

What’s great about this new technology is that it uses nearly all of the same equipment (95-percent) that’s used in the 10nm processing, meaning the company doesn’t have to spend loads of money updating its foundries with tons of new equipment. This should give TSMC a competitive edge in that component manufacturing contracts with customers could be hard to beat on a pricing level.

During the meeting, Liu also talked about the company’s 10nm process technology, which will mainly target mobile applications. A number of customer tape-outs are already on-hand since the first quarter of 2016, and more will likely roll in over the next several quarters. Liu doesn’t expect a “sizable demand” for 10nm processing until the second quarter of 2017.

As a refresher, a “tape-out” is the final design of a printed circuit board or an integrated circuit. At one time, these designs were delivered to the manufacturing foundry as data stored on magnetic tape. The term also refers back to a time when printed circuit boards were mapped out by manually placing black line tape down on mylar sheets in an enlarged layout to create a photomask.

In addition to the 7nm news, TSMC recently reported its first quarter results, stating that shipments related to its 16nm and 20nm process technologies accounted for 23 percent of its wafer revenues while its 28nm business accounted for 30 percent of its wafer revenues. Another 53 percent of those wafer revenues were based on “advanced technologies.” Overall, business seemed unaffected in terms of revenue despite the earthquake in February causing a slight delay in wafer shipments.

Although Liu did not reveal during the meeting what companies have already jumped on the 7nm process bandwagon, ARM announced a multi-year agreement last month to collaborate with TSMC on 7nm FinFET process technology to create high-performance, low-power processors. FinFET is short for Fin Field Effect Transistor, which is a 3D transistor that resembles a fin and is used in current processors due to the technology’s superior scalability. The two companies previously collaborated on chips based on 10nm and 16nm FinFET processing.

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